英特尔2017/2018届应届生招聘
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Product Development Engineer - Sort Test Technology Development – 2017/2018届应届生招聘
Work location: Shanghai
Contact: Xiangyi.wu@intel.com
The Intel Sort Test Technology Development (STTD) group is looking for talented and ambitious individuals with strong technical background to join us as Product Development Engineers. Exciting new products and new customers are unfolding and Custom Foundry business is considered to be one of the exciting growth opportunities for Intel. We''re advancing semiconductor manufacturing through leading-edge practices such as Design for Manufacturability (DFM), product identification and traceability.
STTD Product Development Engineer:
As an Intel STTD PDE (Product Development Engineer), you will be working with Intel Custom Foundry customers and Intel STTD PDE teams to develop semiconductor/IC Wafer Sort and Final Test TP (Test Program including but not limited to Mixed Signal, Digital (Scan, MBIST), Analog, Test Pattern Generation/Conversation etc., as well as issue debugging and other engineering activities.
Qualifications and Experience:
- Bachelor, Master or PhD in Electrical Engineering.
- Fluent in English speaking and writing.
- Proven good software skills in programming (C, or C++, or PERL etc.)
Product Development Engineer - Sort Test Technology Development – 2017/2018届应届生招聘
Work location: Shanghai
Contact: Xiangyi.wu@intel.com
The Intel Sort Test Technology Development (STTD) group is looking for talented and ambitious individuals with strong technical background to join us as Product Development Engineers. Exciting new products and new customers are unfolding and Custom Foundry business is considered to be one of the exciting growth opportunities for Intel. We''re advancing semiconductor manufacturing through leading-edge practices such as Design for Manufacturability (DFM), product identification and traceability.
STTD Product Development Engineer:
As an Intel STTD PDE (Product Development Engineer), you will be working with Intel Custom Foundry customers and Intel STTD PDE teams to develop semiconductor/IC Wafer Sort and Final Test TP (Test Program including but not limited to Mixed Signal, Digital (Scan, MBIST), Analog, Test Pattern Generation/Conversation etc., as well as issue debugging and other engineering activities.
Qualifications and Experience:
- Bachelor, Master or PhD in Electrical Engineering.
- Fluent in English speaking and writing.
- Proven good software skills in programming (C, or C++, or PERL etc.)
2017/12/5 17:07:42